Specifications: Dual JK Flip Flop Package IC Positive edge triggered Flip-Flop Operating Voltage: 4.5V to 5.5V Input Rise time at 5V : 16 ns Input Fall time at 5V : 25 ns Minimum High Level Input Voltage: 2 V Maximum Low Level Input Voltage: 0.8 V Available in 14-pin PDIP, GDIP, PDSO packages



